1. Field of the Invention
The present invention relates to a structure of semiconductor element with MIM(Metal, Insulator, Metal) capacitor used in RF circuit or analog circuit, which is made up of a pair of parallel plates standing vertically to a substrate, and its manufacturing process.
2. Description of the Related Art
Recently, apparatus in the wireless communication field, such as handy phone, have been developed very well. And, still faster communication and more miniaturized apparatus are required. So, in these days, IC for RF circuit is requested to be highly integrated and low-cost.
In IC for RF circuit of conventional art, GaAs semiconductor or bipolar transistor have been used. However, they are costly and not suitable for integration of base band section etc.
Under the circumstances, recently, miniaturization technique of CMOS has been developed and its operation frequency has become high. Therefore, it has become possible to integrate the base band section with CMOS.
This CMOS technique is especially excellent in high integration at low price. So, by utilizing this, technique to mount RF circuit section and base band section on same chip, is going to be developed.
However, it is necessary for integration of RF circuit with CMOS, to mount RF circuit performing wireless communication and analog circuit giving interface with human, on same chip. And, inactive elements mounted on this kind of chip, are capacitor, inductor, varactor etc.
Among these elements, as for capacitor, generally, MIM structure is adopted, because it can be easily formed in manufacturing process, and because it depends on voltage little. So, capacitor structure of MIM should be adopted for miniaturization.
However, the conventional capacitor with horizontal structure, that is, capacitor structure with insulating film between a pair of horizontal electrode plate, has limit in miniaturization.
By the way, as conventional capacitor, as for DRAM, there is provided what is enhanced capacity by adopting double cylindrical electrode (c.f. JP6-77430, U.S. Pat. No. 5,652,165, U.S. Pat. No. 6,232,199, U.S. Pat. No. 6,403,416).
Moreover, as other conventional capacitor, there is provided what is enhanced capacity by adopting a pair of upper and lower horizontal electrode plates with confronting columns attached to the confronting surfaces of said electrode plates (c.f. JP2002-299555).
However, these conventional methods cannot make remarkable progress in miniaturization of capacitor, because these methods is no more than what is adopted auxiliary means of double cylinder or confronting columns.